Heuristics for fault diagnosis when testing from finite state machines

TY - JOUR

T1 - Heuristics for fault diagnosis when testing from finite state machines

AU - Guo, Q

AU - Hierons, R A

AU - Harman, M

AU - Derderian, K

PY - 2007/3

Y1 - 2007/3

N2 - When testing from finite state machines, a failure observed in the implementation under test (IUT) is called a symptom. A symptom could have been caused by an earlier state transfer failure. Transitions that may be used to explain the observed symptoms are called diagnosing candidates. Finding strategies to generate an optimal set of diagnosing candidates that could effectively identify faults in the IUT is of great value in reducing the cost of system development and testing. This paper investigates fault diagnosis when testing from finite state machines and proposes heuristics for fault isolation and identification. The proposed heuristics attempt to lead to a symptom being observed in some shorter test sequences, which helps to reduce the cost of fault isolation and identification. The complexity of the proposed method is analysed. A case study is presented, which shows how the proposed approach assists in fault diagnosis. Copyright 2006 John Wiley & Sons, Ltd

AB - When testing from finite state machines, a failure observed in the implementation under test (IUT) is called a symptom. A symptom could have been caused by an earlier state transfer failure. Transitions that may be used to explain the observed symptoms are called diagnosing candidates. Finding strategies to generate an optimal set of diagnosing candidates that could effectively identify faults in the IUT is of great value in reducing the cost of system development and testing. This paper investigates fault diagnosis when testing from finite state machines and proposes heuristics for fault isolation and identification. The proposed heuristics attempt to lead to a symptom being observed in some shorter test sequences, which helps to reduce the cost of fault isolation and identification. The complexity of the proposed method is analysed. A case study is presented, which shows how the proposed approach assists in fault diagnosis. Copyright 2006 John Wiley & Sons, Ltd

U2 - 10.1002/stvr.352

DO - 10.1002/stvr.352

M3 - Article

VL - 17

SP - 41

EP - 57

JO - SOFTWARE TESTING VERIFICATION AND RELIABILITY

JF - SOFTWARE TESTING VERIFICATION AND RELIABILITY

IS - 1

ER -