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Improved Test Quality Using Robust Unique Input/Output Circuit Sequences (UIOCs)

Research output: Contribution to journalArticle

Qiang Quo, Rob Hierons, Mark Harman, Karnig Derderian

Original languageEnglish
Pages (from-to)696 - 707
Number of pages12
JournalINFORMATION AND SOFTWARE TECHNOLOGY
Volume48
Issue number8
DOIs
PublishedAug 2006

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  • King's College London

Abstract

In finite state machine (FSM) based testing, the problem of fault masking in the unique input/output (UIO) sequence may degrade the test performance of the UIO based methods. This paper investigates this problem and proposes the use of a new type of unique input/output circuit (UIOC) sequence for state verification, which may help to overcome the drawbacks that exist in the UIO based techniques. When constructing a UIOC, overlap and internal state observation schema are used to increase the robustness of a test sequence. Test quality is compared by using the forward UIO method (F-method), the backward UIO method (B-method) and the UIOC method (C-method) separately. Robustness of the UIOCs constructed by the algorithm given in this paper is also compared with those constructed by the algorithm given previously. Experimental results suggest that the C-method outperforms the F- and the B-methods and the UIOCs constructed by the algorithm given in this paper, are more robust than those constructed by other proposed algorithms.

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