TY - JOUR
T1 - Run-Time Protection of Multi-Core Processors from Power-Noise Denial-of-Service Attacks
AU - Tenentes, Vasileios
AU - Das, Shidhartha
AU - Rossi, Daniele
AU - Al-Hashimi, Bashir M.
PY - 2020/6
Y1 - 2020/6
N2 - In this paper, we show that stress-tests can be potentially used as power-noise viruses in denial-of-service (DoS) attacks by causing voltage emergencies that may lead to data corruptions and system crashes in multi-core processors. This attack targets processors whose operating voltage has been reduced in-the-field for improving energy efficiency. To protect such undervolted processors from this type of attacks, we present a run-time system for detecting and mitigating power-noise viruses. We present voltage noise data from power-noise viruses and benchmarks collected from an Arm multi-core processor, and we observe that the frequency of voltage emergencies dramatically increases during the execution of power-noise attacks. Based on this observation, we propose a regression model that allows for a run-time estimation of the severity of voltage emergencies by monitoring the frequency of voltage emergencies and the operating frequency of the processor. For mitigating the problem, during the execution of critical tasks requiring protection, our system periodically evaluates the severity of voltage emergencies and adapts the operating frequency of the processor in order to reduce the severity of the attack according to a predefined constraint. We demonstrate the efficiency of the proposed run-time protection system on an actual Arm multi-core processor using two power-noise viruses, and we explore trade-offs between protection latency, CPU utilization and power cost. The proposed software achieves with a very low CPU utilization overhead of less than 0.11% to detect and mitigate power-noise DoS attacks with a latency of 100 μ\mathrm s.
AB - In this paper, we show that stress-tests can be potentially used as power-noise viruses in denial-of-service (DoS) attacks by causing voltage emergencies that may lead to data corruptions and system crashes in multi-core processors. This attack targets processors whose operating voltage has been reduced in-the-field for improving energy efficiency. To protect such undervolted processors from this type of attacks, we present a run-time system for detecting and mitigating power-noise viruses. We present voltage noise data from power-noise viruses and benchmarks collected from an Arm multi-core processor, and we observe that the frequency of voltage emergencies dramatically increases during the execution of power-noise attacks. Based on this observation, we propose a regression model that allows for a run-time estimation of the severity of voltage emergencies by monitoring the frequency of voltage emergencies and the operating frequency of the processor. For mitigating the problem, during the execution of critical tasks requiring protection, our system periodically evaluates the severity of voltage emergencies and adapts the operating frequency of the processor in order to reduce the severity of the attack according to a predefined constraint. We demonstrate the efficiency of the proposed run-time protection system on an actual Arm multi-core processor using two power-noise viruses, and we explore trade-offs between protection latency, CPU utilization and power cost. The proposed software achieves with a very low CPU utilization overhead of less than 0.11% to detect and mitigate power-noise DoS attacks with a latency of 100 μ\mathrm s.
KW - DoS attack
KW - energy-efficiency
KW - PDN
KW - power-noise virus
KW - Security
KW - undervolted microprocessor
UR - http://www.scopus.com/inward/record.url?scp=85086759860&partnerID=8YFLogxK
U2 - 10.1109/TDMR.2020.2994272
DO - 10.1109/TDMR.2020.2994272
M3 - Article
AN - SCOPUS:85086759860
SN - 1530-4388
VL - 20
SP - 319
EP - 328
JO - IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
JF - IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
IS - 2
M1 - 9091594
ER -
